DRAM Bus and PDN Designer, up to Sr. Staff

*Company:*Qualcomm Semiconductor Limited*Job Area:*Engineering Group, Engineering Group > ASICS Engineering*General Summary:Qualcomm Overview:*Qualcomm is a company of inventors that unlocked edge AI and connected computing ushering in an age of rapid acceleration in connectivity and new possibilities that will transform industries, create jobs, and enrich lives. But this is just the beginning. It takes inventive minds with diverse skills, backgrounds, and cultures to transform high performance AI and connected computing potential into world-changing technologies and products. This is the Invention Age - and this is where you come in.*Job Overview:*The Qualcomm Memory System/Technology Team in Process & Package Solutions Group has an opening in the areas of custom DRAM design and architecture for memory-centric compute systems for data center, mobile, compute, and XR. The candidate will design bus circuits and power distribution network for the custom DRAM to improve system KPIs such as bandwidth, latency, power, and thermal. The candidate will work on solutions of high-speed and high-bandwidth bus design for advanced memory. The candidate should have familiarity with the bus and compute fabrics as well as advanced packaging and 3D integration. This position offers the opportunity to work across multiple organizations such as process and packaging team, AI and compute architects, memory controller team, global SoC team, and emulation team. Providing timely feedback and updating architecture and design trade-offs to the team is essential.*Responsibilities:*Develop and optimize circuits for high-bandwidth memory bus and PDN control, timing, and controlAnalyze and ensure the integrity of signals on the bus and PDN across PVT cornersDevelop and validate the bus behavior for various access protocols to meet throughput, latency, and energy specificationsDevelop novel fabrics for best/robust distribution of high-bandwidth busses and PDN across the DRAM array, compute, and IOCreate layouts that optimize the bus and PDN placement for routability across the whole chipUse state-of-the-art design and simulation tools to simulate the bus behavior and manufacture readinessDevelop behavioral, timing, and power models of the bus to guide the architecture choices across AI, compute, and mobile workloadsDevelop power modeling framework to build state-dependent power and determine PMIC requirementsFloorplan 3D DRAM chips under 3D integration manufacturing constraints, testability, repairability, and high performance*Minimum Qualifications:*Experience in memory bus design (SRAM/DRAM/Flash/ROM/OPT, etc)Good knowledge of bus communication protocolsKnowledge of high-speed design principles and reliabilityAbility to assess the robustness of bus architecture that interacts with multiple modules such as DRAM bank, PHY, and memory controllerAbility to develop Verilog/Verilog-A/Verilog-AMS models of critical datapathExperience in mixed-signal design, layout, and simulationProficiency in use of EDA tools, Matlab, and PythonGood knowledge of memory architecture, buses, and 2.5D/3D integrationMaster's or Ph.D. in Electrical Engineering and a related field*Preferred Qualifications:*Experience in DRAM architecture performance assessmentExperience in programming language (C/C++/Phyton) or scripting language (Perl/Python)Familiar with the DRAM datasheets and IO interfaces*Soft Skills:*Self-Starter with good communication skills and team-working spiritStrong problem-solving and analytical skillsAbility to work independently and as part of a team*Minimum Qualifications:*Bachelor's degree in Science, Engineering, or related field and 6+ years of ASIC design, verification, validation, integration, or related work experience.ORMaster's degree in Science, Engineering, or related field and 5+ years of ASIC design, verification, validation, integration, or related work experience.ORPhD in Science, Engineering, or related field and 4+ years of ASIC design, verification, validation, integration, or related work experience.Applicants: Qualcomm is an equal opportunity employer. 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