Senior Post Silicon SoC Debug Engineer

1 week ago

New Taipei, Taiwan Google Full time $150,000 - $200,000 per year
Minimum qualifications:
  • Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science or a related field or equivalent practical experience.
  • 5 years of experience in silicon bring-up or validation.
  • Experience with software debug tools (gdb) or hardware debug tools Joint Test Action Group (JTAG)/TRACE32.
  • Experience in general-purpose programming language (i.e., C).
  • Experience in developing silicon validation tests and debugging post-silicon issues.
Preferred qualifications:
  • Master's degree or PhD in Electrical Engineering, Computer Engineering or Computer Science, with an emphasis on computer architecture.
  • Experience with Android, Embedded Linux, Real-Time Operating System (RTOS) or bare metal software.
  • Experience with embedded software development and related tool chains.
  • Understanding of computer architecture fundamentals.
About the job:

Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.

Google's mission is to organize the world's information and make it universally accessible and useful. Our team combines the best of Google AI, Software, and Hardware to create radically helpful experiences. We research, design, and develop new technologies and hardware to make computing faster, seamless, and more powerful. We aim to make people's lives better through technology.

Responsibilities:
  • Manage post-silicon error debugging to support the silicon volume ramp at the system level.
  • Collect the post-silicon characterization data to improve the production quality and yield.
  • Collaborate with design and validation leads to the root cause failure.
  • Collaborate with internal test engineers, partner engineers, and contract manufacturers on screening parts, debugging RMAs, signing-off on releases.

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