Senior DRAM Circuit Design Engineer

2 days ago


Chiayi County, Taiwan Winbond Full time NT$720,000 - NT$1,440,000 per year

【工作內容】
作為華邦的(台南)Senior DRAM Circuit Design Engineer,你將負責替客戶設計符合需求的電路圖,與製程研發/CAD/產品測試/FAE等團隊合作,完成重要專案。工作內容包含:

  • DRAM Circuit design and simulation
  • Design verification and Failure Analysis

【條件要求】
學歷要求:大學

科系要求:電機電子工程相關 │ 資訊工程相關 │

相關經驗:4年以上

語言能力:英文 優級 │ │

管理責任:No

輪班需求:No

出差需求:1個月以下

外派需求:No

其他條件:

1 .Above 4 years experience

  • [DRAM] DDR/2/3/4 SDRAM, or [Mobile DRAM] LPDDR2/3/4 & LPDDR4X SDRAM
  • DRAM design experience is required.


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