Design Verification Eng.

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Together, we advance your career.

THE ROLE: 

AMD Image Signal Processor (ISP) team is looking for a staff engineer responsible for design work for AMD future products. He/she will be a key technical member in design team and co-work with different functional teams (Architect, Algorithm, Design, Verification, Firmware, etc.) to deliver AMD ISP subsystem designs to SoC. He/she will have the opportunity to work with the global teams to develop a chip from end to end and touch industry-advanced design flows, methodologies, and knowledge.

THE PERSON:

The candidate would be hired in as staff engineer level, with the expectation that he/she would have minimal 3-5 years of RTL design experience in the multimedia, image processing or similar industry. A candidate that has a strong image science background with a focus on image signal processing (ISP) is highly desirable.

KEY RESPONSIBILITIES:

• Participate in ISP hardware architecture definition, responsible for ISP block level macro architecture
• Design and implement ISP pipeline and blocks based on IP architecture and algorithm specification
• Closely interact with algorithm, verification and firmware team in new feature definition, deliver design specification and program guide
• Work with verification team and firmware team to complete ISP pipeline pre silicon and post silicon validation
• Maintain design environment, solve flow issues, and develop scripts to improve flow efficiency
• Collaborate and interface with local and global management to make accountable deliverables on time

PREFERRED EXPERIENCE:

• BS-CS/BS-EE with at least 7 years' experience or MS with at least 5 years' experience in ASIC/SoC design
• Familiar with C/C++ programming and unix/linux and scripts (tcl, perl etc.)
• Familiar with front-end EDA tools and flows.
• Strong multimedia/video/camera related system level knowledge and experience
• Strong individual analysis, problem solving skills and teamwork attitude
• Will be a plus if having low power design, debugging and modeling experience
• Will be a plus if having FPGA validation experience
• Experience of working with multi-site teams is preferred

ACADEMIC CREDENTIALS:

• Bachelor or Master, major in EE, CS or related area

LOCATION:

• Hsinchu, Taiwan

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Benefits offered are described:  AMD benefits at a glance.

AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law.   We encourage applications from all qualified candidates and will accommodate applicants' needs under the respective laws throughout all stages of the recruitment and selection process.